after i updated my jlink installation with knowledge about the RV32M1_M4 and RV32M1_M0P targets (found under the third_party_pack folder in the ARM sdk), i’m able to use jlink *without* the gdb/ocd front-end — which is actually my goal for reasons beyond the scope of this question)….
can i do something comparable with the risc-v cores???? i have found the OpenOCD scripts, which talk to the jlink probe (connected to J55 in this case) over telnet and then erase/load firmware…. but there isn’t an equivalent third_party_pack folder in the RISC-V sdk that encapsulates this information in a manner comparable to the ARM cores….
again, my goal is to load the risc-v cores directly through jlink using the default USB driver provided by segger….
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