While trying to enable the SRAM retention for Sleep and Deep-sleep mode I’ve noted an unexpected behavior. In the RV32M1 Reference Manual Rev. 1.1 It is said that SRAMLPR and SRAMDSR are used to enable the SRAM retention, however, when I try to write directly on these registers, my program stops. Although they are correctly defined in the file RV32M1_core.h, the FSL_FEATURE_SMC_HAS_SRAMDSR and FSL_FEATURE_SMC_HAS_SRAMLPR are not defined in RV32M1_core_features.h, and therefore, the driver in fsl_msmc.h does not work with SMC_SRAMEnableLowPowerMode().
Anyone knows how can I enable the SRAM retention for this board ?
Actually, my code to be executed just before entering in sleep mode is :
uint32_t idxITCM0 = 0x1; //bit 0
uint32_t idxDTCM0 = 0x10000; // bit 16
SMC0->SRAMLPR = SMC_SRAMLPR_LPE(bitITCM0 | bitDTCM0);
The reason that those features are not defined in the SDK is because it can cause a runtime issue if the user doesn’t have the correct configurations.
Are you trying to access the memory in those SRAM regions (ITCM0 and DTCM0 banks) after disabling them? If you want to save more power by setting the SRAM banks into low power retention state or power off state in the stop mode, you need to make sure you’re not accessing the SRAM bank that you enabled the retention for.
It seems in your code you enabled the retention for the ITCM0 and DTCM0 banks. Is there any code running in these banks?
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